My research work with Prof. Yuri Pashkin, Prof. Edward Laird, and Prof. Ian Bailey at Lancaster University includes:  

• Fabrication of Josephson junction-based traveling wave parametric amplifiers (JPAs) using the electron beam lithography (EBL).
• Integrating JPAs into the dark matter detector and optimise for a haloscope experiment.
• Teaching assistant (undergraduate courses)

I am an electronics engineer with experience in

• Semiconductor device fabrication
• Non-volatile memories (FLASH, ReRAM/Memristor)
• Two-dimensional materials for electronics
• Analog/analogue and digital electronics
• Printed flexible electronics, SuperInjket printer
• Senors, Biosensing, Wireless-biosensors 
• Device modelling and simulation
• Neuromorphic computing
• Superconducting quantum electronic device
• Parametric amplifiers
• Josephson circuits
• Dark matter

An ambitious researcher with 7+ years of R&D and teaching experience particularly focusing on nano-electronic/photonic device processing, quantum/Nano-technology, with a keen interest to learn new things working at the forefront for the development of new device technologies, who welcomes challenges. Highly adaptable to situations, skilled to motivate, and mentor young minds to perform research activities at the interface of various fields.

I also possess 7+ years of hands-on experience in semiconductor device fabrication and cleanroom activities at:-

• Quantum Technology Centre (QTC) - Lancaster University, Lancaster (U.K.)
• James Watt Nanofabrication Centre (JWNC) -University of Glasgow, Glasgow (U.K.)
• Centre for Nano Science and Engineering (CeNSE) - Indian Institute of Science Bengaluru, Bengaluru, Karnataka, India
• Centre of Excellence in Nanoelectronics (CEN) - Indian Institute of Technology Bombay, Bombay, Maharashtra, India
• Centre for Desing and Fabrication of Electronic Devices (C4DFED) - Indian Institute of Technology Mandi, Mandi, Himachal Pradesh, India

Senior Research Associate, with Prof. Manus Hayne, Lancaster University, UK        06/2020 –06/2021

Research Assistant, BEST Group, University of Glasgow, UK                                   12/2018–05/2020

• Nanotechnology-based electronics. Fabricated array of memristors (ReRAM) to perform computation and storage for electronic skin applications.
• Development of printed sensor devices based on nanocomposite for electronic skin applications.
• Extensive experience in working with super inkjet printing for printed electronic applications.
• Teaching assistant (undergraduate course) – Analogue electronics

Assistant Professor, GLA University Mathura (U.P.), India                                     07/2012–02/2014 

• Teaching activities (undergraduate courses) – RADAR communication, Linear integrated circuits, Xilinx design, Electronic measurement and instrumentation, Electromagnetic field theory, Basic electronics. 
• Supervised 4 undergraduate engineering students on their final year projects.
• Administrative – Assistant warden for the boys’ hostel. Managed 10+ staff members and 400+ students.

Bharat Sanchar Nigam Limited (Summer Internship)                                            06/2008–07/2008

• Overview of telephone and mobile communication system.
• Overall working of the exchange, maintenance and operations.

Solwins Technologies (Summer Internship)                                                          05/2009–06/2009

• Exposure to programmable logic controller (PLC) and supervisory control and data acquisition (SCADA).
• Industrial automation for food and beverage industries.

Ph. D in Electronics Engineering, Indian Institute of Technology Mandi, India         02/2014–11/2018 

Thesis – Graphene and derivatives based electronic and memory devices

Supervisors – Dr. Satinder Kumar Sharma, Dr. Ajay Soni

• Developed and optimized process parameters for the growth and transfer of high-quality CVD graphene.
• Synthesis of graphene oxide (GO), reduced GO (rGO) and controlled functionalization for its application in conductive inks, sensors, FETs, memory devices, and supercapacitors.
• Demonstrated a methodology for the pattering of GO – rGO for circuit elements in flexible electronics.
• Teaching assistant (under/post graduate courses) – Microelectronics, Basic electronics laboratory, Applied electronics laboratory, VLSI Testing and technology, Electronics laboratory.

M.Tech in VLSI Design, Malaviya National Institute of Technology Jaipur, India        07/2010–06/2012

Thesis – Exploration of power optimal high performance multi-valued circuits using CNFETs

Supervisor – Prof. Vineet Sahula

• Simulated carbon nanotubes based transistors and invertors in HSPICE for its use in power optimal circuits.
• Simulated multi-valued combinational and sequential logic circuits in HSPICE using carbon nanotube-based FETs for its use in digital systems and logic designs.
• Simulated 180 nm Implementation of Accurate, Efficient FFT Algorithm and published the results in IEEE RASDAT conference.
• Teaching assistant (under/post graduate courses) – System design lab (simulation in Cadence and HSPICE).

B.E. in Electronics and Telecommunication, Chhatrapati Shivaji Institute of Technology, Durg, India  08/2006–06/2010    

Thesis – Autonomous Parallel Car Parking System

• Developed an algorithm which can be used to detect moving/stationary objects using ultrasonic sensors and determination of the movement trajectory.
• Developed a custom designed car operated with commercially available solar panel and validated the algorithm in real-time for autonomous car parking functionality.

Member of IEEE (Institute of Electrical and Electronics Engineers)                               2019 - present

Student Member IEEE (Institute of Electrical and Electronics Engineers)                     2019 - 2016

Member of APS (American Physical Society)                                                                   2017 - present

Member of SIRMB (Society for Interdisciplinary Research in Materials and Biology)   2018 - present

E-mail: [email protected]; [email protected]